Integrated Block-Processing and Design-Space Exploration in Temporal Partitioning for RTR Architectures

We present an automated temporal partitioning and design space exploration methodology that temporally partitions behavior speci cations. We propose block-processing in the temporal partitioning framework for reducing the recon guration overhead for partitioned designs. Block-processing is a technique used traditionally in the area of parallel compilers, for increasing the computation speed by processing several inputs simultaneously. Block-processing technique has been integrated with task-level design space exploration to achieve designs that justify temporal partitioning of systems. An ILP-based methodology has been proposed to solve this problem. We present experimental results for the Discrete Cosine Transform (DCT).